Our SMU-N product is a processor solution to run such large AI models from the device by significantly reducing the data traffic between processor and memory.

Genertive AI model such as large langague model (LLM) has lots of paramters. In the conventional processor architecture, the trained model is stored in NAND, copied to DRAM and then processed, requiring large amount of data traffic. Moving data in this way results in a significant performance bottleneck ("memory wall problem"), consumes lots of amount of power, and requires large amount of DRAM. SMU-N processor solution can significantly reduce data traffic bewteen processor and DRAM with reduced amount of DRAM capacity, and advanced SMU-N+ processor solution integrated in NAND can further reduce data traffic between processor and NAND where the trained AI model is stored persistently.